The rapid expansion of digital technologies has led to the emergence of disruptive business models driven by data collection and processing, notably through the Internet of Things (IoT). However, security attacks pose significant challenges for IoT, with global damages reaching $6 trillion in 2021 and 1,097 organizations falling victim to ransomware attacks. Secure IoT relies on physical unclonable functions (PUFs), embedded hardware functions capable of generating unique responses to input challenges based on intrinsic entropy sources. Recent advancements in attack methods have shifted PUF technology from traditional silicon-based CMOS to emerging nonvolatile memories (NVMs), enabling high-density, low-cost, and scalable PUFs with reconfiguration capabilities. However, a truly tamper-resistant and reliable PUF for cryptographic key generation leveraging stochastic switching of NVMs for secure IoT remains elusive but highly demanded by the market.
Objective
The SHANNON – Secure Hardware with AdvaNced NONvolatile memories project aims to develop a new type of encryption circuit based on the concept of physical unclonable function. The encryption keys are generated by random memory states that are completely invisible to malicious external inspections, thanks to algorithms and circuits that were developed and patented in the context of several research projects.
Although there is a lack of PUF solutions in the industry that can guarantee high reliability, immunity to invasive attacks, and reconfigurability at the same time, our preliminary research has shown that emerging nonvolatile memories in specific states could be suitable to achieve all the required targets with moderate power consumption. These results pave the way for promising alternatives to conventional power-hungry CMOS approaches while supporting the unique reconfigurability property of emerging NVMs.
Our project will address the technical and commercial feasibility of an invisible PUF, validating the concept with embedded nonvolatile memories and elevating its technology readiness level via circuital design, experimental tests, and simulations. The ultimate goal is to understand the feasibility of our approach in IoT applications with high-security requirements.
People
Prof. Daniele Ielmini, Principal Investigator
Prof. Daniele Ielmini received the Laurea (with merit) and Ph.D. in Nuclear Engineering from Politecnico di Milano in 1995 and 2000, respectively. He held visiting positions at Intel Corporation (2006), Stanford University (2006), and the University of Illinois at Urbana-Champaign (2010). His research interests include the modeling and characterization of non-volatile memories, such as nanocrystal memory, charge trap memory, phase change memory (PCM), resistive switching memory (RRAM), and spin-transfer torque magnetic memory (STT-MRAM).
Lorenzo Cattaneo, PhD Student
Lorenzo Cattaneo received the B.Sc. and M.Sc. degrees in Electronics Engineering from Politecnico di Milano in 2018 and 2021, respectively. Today he is actively pursuing a PhD in Information Technology (Electronics) at Dipartimento di Elettronica, Informazione e Bioingegneria of Politecnico di Milano. His main research interests focus on circuit design for hardware security and in-memory computing (IMC) accelerators with emerging devices.